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As traditional monolithic silicon scaling hits its physical and economic limits, the roadmap for generative AI, High-Performance Computing (HPC), and 5G/6G architectures has decisively shifted to System Technology Co-Optimization (STCO) and advanced multi-die packaging.
To equip the next generation of engineers, materials scientists, and semiconductor professionals with the rigorous cross-stack mechanics required for this era, SemiTech Insights is proud to announce our upcoming comprehensive training series hosted by the MEST Center, launching this July 2026.
Taught by industry veterans Dr. Mohamed Arafa and Tom McCune, this curriculum is divided into two deep-dive parts designed to bridge system-level architecture with advanced manufacturing physics:
Focus: Overcoming the "memory wall" and physical bottlenecks.
Key Topics: Monolithic IP disaggregation (logic, analog, SRAM), Known Good Die (KGD) yield validation, near-memory coupling, HBM3 to HBM4 structural roadmaps, sub-volt Power Delivery Networks (PDN), backside power delivery (BSPDN), and thermal hotspot isolation.
Learn more & register for Part I: https://mestcenter.org/training/advanced-packaging-stco-part-i/
Focus: Physical unit process integration and high-volume advanced assembly mechanics.
Key Topics: Advanced organic and glass core substrates (SAP, mSAP, ABF), warpage control and CTE mismatch mitigation, sub-micron Cu-Cu hybrid bonding, large-body Fan-Out with adaptive routing, and Co-Packaged Optics (CPO) including TSMC's COUPE platform.
Learn more & register for Part II: https://mestcenter.org/training/advanced-packaging-stco-part-ii/