Ramune Nagisetty

Ramune Nagisetty is an enterprise account director at PDF Solutions. She was previously a Fellow in semiconductor technology research at NATCAST and a Senior Principal Engineer at Intel. At NATCAST she was responsible for the NSTC research agenda, research inputs for facilities planning, and methodologies to improve research differentiation. Her prior 29 years at Intel include a decade in transistor technology development leading innovations in silicon strain engineering, as well as pathfinding for hiK metal gate and FinFET. In 2010, informed by her background in silicon technology development, she developed a strategy and architecture to use chiplets, advanced packaging, and standardized interfaces to reduce overall portfolio cost, scale innovation, and speed time to market. Her vision for an industry-scale chiplet ecosystem has been featured in Wired Magazine, AnandTech, and IEEE Spectrum. In Intel Labs she led a system prototyping team and developed wearable technologies and usage models. In recent years she has led efforts to characterize unwanted process-design interactions and accelerate leading edge process technology development and product ramps.

Ramune earned a BSEE from Northwestern University in 1991 and an MSEE specializing in solid state physics from the University of California, Berkeley in 1995. She has fourteen technical publications and fifteen patents related to device physics, high performance process technology, and wearable technology usage models. She has been a keynote speaker at multiple IEEE conferences and serves on the IEEE Spectrum Advisory Board.